I am a researcher/educator interested in hardware-software codesign. I love building custom digital hardware, compilers/passes for targetting that hardware and thinking about how to make it accessible through better programming models and abstractions.

I have experience in both academica (Imperial/Cambridge/Swansea) and industry (Microsoft Research/AMD Research) building:

• Frameworks that make it easier to interact with custom ML hardware in AMD devices Riallto (GitHub)
• Frameworks for allowing users to easier interact with custom hardware in FPGA devices PYNQ (GitHub)
• Courses for teaching embedded systems and custom hardware EmSys (GitHub)
• Distributed FPGA-based SmartNIC key-value store accelerators Honeycomb (Paper)
• Multi-FPGA-based event-triggered high-performance computing systems POETS (paper)
• Compiler passes for generating protected circuits for Space Applications StitchUP (paper) StitchUP (GitHub)
• Higher-order type systems for seamlessly linking hardware and software PushPush (paper)

I’m always happy to chat, so please reach out if you want to discuss things.