The arrival of the MityARM at Imperial
Written by Shane Fleming
Despite OPS-SAT being a CubeSat, weighing in at only 6Kg, its computational ability will be more than ten times anything currently in the European Space Agencies fleet. One of the computational units, which just got delivered to our research group, can be seen in the picture above. This is a critical links MityARM SoC (system on chip) development board, and is one of four that will make up OPS-SATs computation payload.
One of the reason that this mission will be computationally more powerful than any other is because it is using commercial off the shelf components (COTS). This means that instead of components being custom made (the usual approach in satellite design) general purpose ones were bought. COTS dramatically reduce the costs but there is one major issue in using them, radiation.
High energy particles emitted from the sun and/or trapped in the Earths magnetic field can disrupt electronics in orbit. When one of these particles strikes a device it can cause what is known as a Single Event Upset (SEU), flipping a bit from a 1 to a 0, or 0 to a 1. This unintended change in state can have catastrophic consequences, for example the TDRS-1 communication satellite experienced SEUs in its Attitude Control System (ACS), luckily ground control was able to prevent the satellite from tumbling and maintain its proper attitude.
The MityARM SoCs in OPS-SATs payload are particularity vulnerable to the effect of high energy particles because they contain an electronic device known as an FPGA (Field Programmable Gate Array). Think of an FPGA as a blank digital circuit that you can reprogram, sort of like a “soft” digital circuit, where the description of this circuit is held in an SRAM. SRAMs are highly sensitive to SEUs and in an FPGA any bit flip can not only alter data but alter the structure of the soft circuit.
Our work aims to explore just how sensitive these modern COTS FPGAs are to high energy particles in orbit. Through building test circuits and monitoring the systems behaviour we hope to be able to provide a comprehensive data set for future space FPGA designers to use.